1. Field
Some example embodiments of the inventive concepts relate to a semiconductor device having a low-resistance contact plug.
2. Description of Related Art
Various methods of reducing a contact resistance in a semiconductor device having an NMOS region and a PMOS region have been studied. A technique using a plug ion implantation method has been tried in order to reduce a contact resistance. A plurality of contact holes are formed on an NMOS region and a PMOS region, and B or P may be implanted through the plurality of contact holes. In the case of doping with B, it may be effective in reducing a contact resistance of the PMOS region but may increase the contact resistance of the NMOS region. In the case of doping with P, it may be effective in reducing the contact resistance of the NMOS region but may increase a contact resistance of the PMOS region.